A compact multi-LC-tank Class-F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">234</sub> voltage-controlled oscillator (VCO) for mm-wave applications is reported. It features an inductive multiplier inside the positive feedback loop to suppress the effective noise factor of the MOS devices. Also, by pseudo-squaring the drain-voltage waveform of the MOS devices via 2nd, 3rd, and 4th harmonic peaking, we obtain a…
IEEE Solid-State Circuits Letters Template
Write in a clean editor, then format for IEEE Solid-State Circuits Letters in one click — DocuGuru applies the official IEEE template with numbered references and exports a submission-ready PDF plus the editable LaTeX source. Free to start.
About the IEEE Solid-State Circuits Letters format
IEEE Solid-State Circuits Letters is a peer-reviewed journal published by IEEE, covering Radio Frequency Integrated Circuit Design, Analog and Mixed-Signal Circuit Design, Advancements in PLL and VCO Technologies. Over its lifetime it has published 834 papers, which have received 7,097 citations.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Solid-State Circuits Letters, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in IEEE Solid-State Circuits Letters style. No sign-up. |
| Abbreviation (ISO-4) | SSCL |
| Publishes research in | Radio Frequency Integrated Circuit Design Analog and Mixed-Signal Circuit Design Advancements in PLL and VCO Technologies Advancements in Semiconductor Devices and Circuit Design Semiconductor materials and devices |
| ISSN | 2573-9603 |
| Citation impact (2-yr) | 1.88 |
| h-index | 35 |
| i10-index | 266 |
| Top institutions publishing here | Intel (United States) |
| Journal website | ieeexplore.ieee.org |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Papers published in IEEE Solid-State Circuits Letters per year
Citation impact of IEEE Solid-State Circuits Letters by publication year
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Most-cited papers in IEEE Solid-State Circuits Letters
This letter presents a low-power dynamic comparator for ultralow power applications. The prototype is designed in a 65-nm CMOS process with a supply voltage of 1 V and is compared against the widely used double tail latch comparator in terms of power consumption and input referred rms noise. The addition of cross-coupled devices to the…
This letter proposes a new level-shifting structure that can convert extremely low levels of input voltages to high output voltages while maintaining excellent delay and power dissipation. In order to reduce contention and voltage swing in the internal nodes, the proposed circuit uses a diode-connected level shifter between gate terminals of the output inverter. Using…
A piezoelectric energy-harvesting system, including a parallel-synchronized-switch harvesting-on-inductor (SSHI) rectifier and integrated maximum-power-point tracking (MPPT), is presented. The perturb & observe (P&O) algorithm is adopted for the MPPT of the parallel-SSHI rectifier. Furthermore, an output power evaluation algorithm for the P&O MPPT is proposed and its detailed implementation in the full analog domain is analyzed.…
A wake-up receiver (WuRX) that achieves −80.5-dBm sensitivity with only 6.1 nW of power is presented. High sensitivity is achieved via a passive pseudo-balun envelope detector (ED) with a high input impedance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$> 750~\text {k}{\Omega }\;{\|}{< }1.4$ </tex-math></inline-formula> pF) that enables a 30.6-dB passive voltage gain transformer while providing differential…