CRYSTALS-Kyber has emerged as a notable lattice-based post-quantum cryptography (PQC) scheme. As one of the four finalists in NIST's PQC standardization round three, CRYSTALS-Kyber is the only encryption algorithm demonstrating superior performance compared to other algorithms. The number theoretic transform (NTT) is employed to optimize polynomial multiplication, which constitutes the most complex operation within CRYSTALS-Kyber.…
Integrated Circuits and Systems Template
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About the Integrated Circuits and Systems format
Integrated Circuits and Systems is a peer-reviewed journal published by IEEE, covering Ferroelectric and Negative Capacitance Devices, Analog and Mixed-Signal Circuit Design, Sensor Technology and Measurement Systems. Over its lifetime it has published 93 papers, which have received 114 citations.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," Integrated Circuits and Systems, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in Integrated Circuits and Systems style. No sign-up. |
| Publishes research in | Ferroelectric and Negative Capacitance Devices Analog and Mixed-Signal Circuit Design Sensor Technology and Measurement Systems Parallel Computing and Optimization Techniques Low-power high-performance VLSI design |
| ISSN | 2995-1968 |
| Citation impact (2-yr) | 1.23 |
| h-index | 6 |
| i10-index | 3 |
| Top institutions publishing here | Fudan University |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Papers published in Integrated Circuits and Systems per year
Citation impact of Integrated Circuits and Systems by publication year
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Most-cited papers in Integrated Circuits and Systems
Transformer-based large language models (LLMs) have made significant strides in the field of artificial intelligence (AI). However, training these LLMs imposes immense demands on computational power and bandwidth for hardware systems. Wafer-scale chips (WSCs) offer a promising solution, yet they struggle with limited on-chip memory and complex tensor partitioning. To fully harness the high-bandwidth, low-latency…
This work presents a bandgap voltage reference (BGR) with source-sink dual current compensation achieving a low temperature coefficient (TC) over the automotive temperature range from −40 to 125 °C. The two compensation currents are the inverted-V current (I<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">invV</sub>) and the high-low temperature linear current (I<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HLT</sub>), which appear in the form of…
This work presents a PAM4 receiver analog frontend (AFE) operating up to 64 Gb/s. The electronic integrated circuit (EIC) is fabricated in 40-nm CMOS technology. This AFE is composed of a single-stage Continuous-Time Linear Equalizer (CTLE), a Variable Gain Amplifier (VGA), an input impedance matching network, a buffer stage, and an output buffer. The single-stage…
A low-power, high-speed dynamic comparator with the addition of a cross-coupled pair in the pre-amplifier stage, followed by a strong-arm latch, is presented. The proposed modification increases the pre-amplifier's differential and common-mode gains, improving the latch's differential and common-mode input voltage, resulting in faster regeneration with 22% speed improvement as compared to conventional comparator at…