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IEEE Transactions on Electron Devices is a peer-reviewed journal published by IEEE, covering Semiconductor materials and devices, Advancements in Semiconductor Devices and Circuit Design, Silicon Carbide Semiconductor Technologies. Over its lifetime it has published 32,988 papers, which have received 819,151 citations.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Transactions on Electron Devices, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in IEEE Transactions on Electron Devices style. No sign-up. |
| Publishes research in | Semiconductor materials and devices Advancements in Semiconductor Devices and Circuit Design Silicon Carbide Semiconductor Technologies Semiconductor Quantum Structures and Devices Ferroelectric and Negative Capacitance Devices |
| ISSN | 0018-9383 |
| Citation impact (2-yr) | 3.03 |
| h-index | 275 |
| i10-index | 16,531 |
| Top institutions publishing here | National Yang Ming Chiao Tung University |
| Journal website | eds.ieee.org |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Citations each year’s papers have accumulated so far — the most recent years are still building up.
This paper presents theoretical calculations of the large-signal admittance and efficiency achievable in a silicon p-n-v-ns Read IMPATT diode. A simplified theory is employed to obtain a starting design. This design is then modified to achieve higher efficiency operation as specific device limitations are reached in large-signal (computer) operation. Self-consistent numerical solutions are obtained for…
MOSFETs with gate length down to 17 nm are reported. To suppress the short channel effect, a novel self-aligned double-gate MOSFET, FinFET, is proposed. By using boron-doped Si/sub 0.4/Ge/sub 0.6/ as a gate material, the desired threshold voltage was achieved for the ultrathin body device. The quasiplanar nature of this new variant of the vertical…
In this paper, we propose and validate a novel design for a double-gate tunnel field-effect transistor (DG tunnel FET), for which the simulations show significant improvements compared with single-gate devices using a gate dielectric. For the first time, DG tunnel FET devices, which are using a high-gate dielectric, are explored using realistic design parameters, showing…
In this paper, we present a comprehensive review and discussion of the state-of-the-art device technology and application development of GaN-on-Si power electronics. Several device technologies for realizing normally off operation that is highly desirable for power switching applications are presented. In addition, the examples of circuit applications that can greatly benefit from the superior performance…
This paper reports the studies of the inversion layer mobility in n- and p-channel Si MOSFET's with a wide range of substrate impurity concentrations (10/sup 15/ to 10/sup 18/ cm/sup -3/). The validity and limitations of the universal relationship between the inversion layer mobility and the effective normal field (E/sub eff/) are examined. It is…
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