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IEEE Electron Device Letters is a peer-reviewed journal published by IEEE, covering Semiconductor materials and devices, Advancements in Semiconductor Devices and Circuit Design, Ferroelectric and Negative Capacitance Devices. Over its lifetime it has published 17,162 papers, which have received 448,251 citations.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Electron Device Letters, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in IEEE Electron Device Letters style. No sign-up. |
| Publishes research in | Semiconductor materials and devices Advancements in Semiconductor Devices and Circuit Design Ferroelectric and Negative Capacitance Devices Thin-Film Transistor Technologies GaN-based semiconductor devices and materials |
| ISSN | 0741-3106 |
| Citation impact (2-yr) | 3.21 |
| h-index | 202 |
| i10-index | 9,481 |
| Top institutions publishing here | National Yang Ming Chiao Tung University |
| Journal website | ieeexplore.ieee.org |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Citations each year’s papers have accumulated so far — the most recent years are still building up.
The problem of achieving compact, high-performance forced liquid cooling of planar integrated circuits has been investigated. The convective heat-transfer coefficient h between the substrate and the coolant was found to be the primary impediment to achieving low thermal resistance. For laminar flow in confined channels, h scales inversely with channel width, making microscopic channels desirable.…
<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> We have demonstrated a 70-nm n-channel tunneling field-effect transistor (TFET) which has a subthreshold swing (SS) of 52.8 mV/dec at room temperature. It is the first experimental result that shows a sub-60-mV/dec SS in the silicon-based TFETs. Based on simulation results, the gate oxide and silicon-on-insulator layer thicknesses were scaled down to…
GaN high-electron-mobility-transistors (HEMTs) on SiC were fabricated with field plates of various dimensions for optimum performance. Great enhancement in radio frequency (RF) current-voltage swings was achieved with acceptable compromise in gain, through both reduction in the trapping effect and increase in breakdown voltages. When biased at 120 V, a continuous wave output power density of…
In this letter, a top-gated field-effect device (FED) manufactured from monolayer graphene is investigated. Except for graphene deposition, a conventional top-down CMOS-compatible process flow is applied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from the top-gated Graphene-FEDs. The extracted values exceed the universal mobility of silicon and silicon-on-insulator MOSFETs
A figure of merit (the Baliga high-frequency figure of merit) is derived for power semiconductor devices operating in high-frequency circuits. Using this figure of merit, it is predicted that the power losses incurred in the power device will increase as the square root of the operating frequency and approximately in proportion to the output power.…
