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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Template

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About the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits format

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits is a peer-reviewed journal published by IEEE, covering Ferroelectric and Negative Capacitance Devices, Advanced Memory and Neural Computing, Parallel Computing and Optimization Techniques. Over its lifetime it has published 393 papers, which have received 3,871 citations.

PublisherIEEE
Reference styleNumbered (IEEE)
Numbered — [1], [2] in the text
[1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 12, no. 3, pp. 45–58, 2023.

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Publishes research inFerroelectric and Negative Capacitance Devices Advanced Memory and Neural Computing Parallel Computing and Optimization Techniques Semiconductor materials and devices Advancements in Semiconductor Devices and Circuit Design
ISSN2329-9231
Citation impact (2-yr)1.99
h-index33
i10-index95
Article processing charge$1,350
Open accessYes — indexed in DOAJ
Top institutions publishing hereGeorgia Institute of Technology
Journal websiteieeexplore.ieee.org
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Papers published in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits per year

18
2015
13
2016
19
2017
22
2018
53
2019
47
2020
54
2021
45
2022
38
2023
27
2024
34
2025

Citation impact of IEEE Journal on Exploratory Solid-State Computational Devices and Circuits by publication year

1.1K
2015
235
2016
342
2017
178
2018
546
2019
359
2020
364
2021
293
2022
272
2023
106
2024
43
2025

Citations each year’s papers have accumulated so far — the most recent years are still building up.

Most-cited papers in IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

Dmitri E. Nikonov, Ian A. Young · 3 Apr 2015

A new benchmarking of beyond-CMOS exploratory devices for logic integrated circuits is presented. It includes new devices with ferroelectric, straintronic, and orbitronic computational state variables. Standby power treatment and memory circuits are included. The set of circuits is extended to sequential logic, including arithmetic logic units. The conclusion that tunneling field-effect transistors are the leading…

349 citations Cite SaveGo to paper →
Tunnel Field-Effect Transistors in 2-D Transition Metal Dichalcogenide Materials

Hesameddin Ilatikhameneh, Yaohua Tan, Bozidar Novakovic et al. · 14 Apr 2015

In this paper, the performance of tunnel field-effect transistors (TFETs) based on 2-D transition metal dichalcogenide (TMD) materials is investigated by atomistic quantum transport simulations. One of the major challenges of TFETs is their low ON-currents. 2-D material-based TFETs can have tight gate control and high electric fields at the tunnel junction, and can, in…

194 citations Cite SaveGo to paper →
Coupled-Oscillator Associative Memory Array Operation for Pattern Recognition

Dmitri E. Nikonov, György Csaba, Wolfgang Porod et al. · 25 Nov 2015

The operation of an array of coupled oscillators underlying the associative memory function is demonstrated for various interconnection topologies (cross-connect and star-coupled). Three types of nonlinear oscillators (Andronov-Hopf, phase-locked loop, and spin torque) and their synchronization behavior are compared. Frequency-shift keying scheme of encoding input and memorized data is introduced. The speed of synchronization of…

167 citations Cite SaveGo to paper →
A Full-Stack View of Probabilistic Computing With p-Bits: Devices, Architectures, and Algorithms

Shuvro Chowdhury, Andrea Grimaldi, Navid Anjum Aadit et al. · 14 Mar 2023

The transistor celebrated its 75 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> birthday in 2022. The continued scaling of the transistor defined by Moore’s Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors…

128 citations Cite SaveGo to paper →
Sub-<i>kT/q</i> Switching in Strong Inversion in PbZr<sub>0.52</sub>Ti<sub>0.48</sub>O<sub>3</sub> Gated Negative Capacitance FETs

Sudeb Dasgupta, Adarsh Rajashekhar, Kausik Majumdar et al. · 22 Jun 2015

Hysteretic switching with a sub- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">kT/q</i> steep slope (13 mV/decade at room temperature) is experimentally demonstrated in MOSFETs with PbZr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.52</sub> Ti <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.48</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> as a ferroelectric (FE) gate insulator, integrated on a silicon channel with a nonperovskite high- <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> dielectric (HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML"…

119 citations Cite SaveGo to paper →

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits template — frequently asked questions

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What reference style does IEEE Journal on Exploratory Solid-State Computational Devices and Circuits use?
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits uses Numbered (IEEE) references, shown as numbered [1], [2] markers in the text. DocuGuru formats every in-text citation and the reference list in this exact style automatically. A reference appears like this: [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 12, no. 3, pp. 45–58, 2023.
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What is IEEE Journal on Exploratory Solid-State Computational Devices and Circuits?
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, published by IEEE. It is a engineering and computer science journal, published by IEEE.
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