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IEEE Design & Test of Computers is a peer-reviewed journal published by IEEE, covering VLSI and Analog Circuit Testing, Diverse Scientific and Economic Studies, Integrated Circuits and Semiconductor Failure Analysis.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Design & Test of Computers, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in IEEE Design & Test of Computers style. No sign-up. |
| Publishes research in | VLSI and Analog Circuit Testing Diverse Scientific and Economic Studies Integrated Circuits and Semiconductor Failure Analysis Human auditory perception and evaluation Embedded Systems Design Techniques |
| ISSN | 0740-7475 |
| h-index | 111 |
| i10-index | 799 |
| Total citations | 54,101 |
| Top institutions publishing here | Intel (United States) |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Editor's note:Today's integrated circuits are vulnerable to hardware Trojans, which are malicious alterations to the circuit, either during design or fabrication. This article presents a classification of hardware Trojans and a survey of published techniques for Trojan detection.
Many SoC applications require guaranteed levels of service and performance. Can networks on chips (NoCs) enable such guarantees? Here, the authors demonstrate that the Æthereal network can. This particular NoC, developed at Philips Research Laboratories, encompasses hardware, a programming model, and a design flow. Read on to find out about the details. © 2005 IEEE.…
This article provides a practical introduction to the design trade-offs of the currently available 3D IC technology options. It begins with an overview of techniques, such as wire bonding, microbumps, through vias, and contactless interconnection, comparing them in terms of vertical density and practical limits to their use. We then present a high-level discussion of…
As the dimensions and operating voltages of computer electronics shrink to satisfy consumers' insatiable demand for higher density, greater functionality, and lower power consumption, sensitivity to radiation increases dramatically. In terrestrial applications, the predominant radiation issue is the soft error, whereby a single radiation event causes a data bit stored in a device to be…
We propose an OS-directed power management technique to improve the energy efficiency of sensor nodes. Dynamic power management (DPM) is an effective tool in reducing system power consumption without significantly degrading performance. The basic idea is to shut down devices when not needed and wake them up when necessary. DPM, in general, is not a…
