This paper presents a detailed clock jitter characteristic analysis of a fully integrated 1.5-GHz resonant clocking fabricated in 130-nm CMOS, with 57% total clock power saving, compared to the con ...
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Proceedings of ESSCIRC is a peer-reviewed journal published by IEEE, covering Analog and Mixed-Signal Circuit Design, Radio Frequency Integrated Circuit Design, Advancements in Semiconductor Devices and Circuit Design.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," Proceedings of ESSCIRC, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in Proceedings of ESSCIRC style. No sign-up. |
| Publishes research in | Analog and Mixed-Signal Circuit Design Radio Frequency Integrated Circuit Design Advancements in Semiconductor Devices and Circuit Design Advancements in PLL and VCO Technologies Low-power high-performance VLSI design |
| Papers published last year | ≈56 |
| ISSN | 1930-8833 |
| h-index | 23 |
| i10-index | 66 |
| Total citations | 1,980 |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
This paper presents a detailed clock jitter characteristic analysis of a fully integrated 1.5-GHz resonant clocking fabricated in 130-nm CMOS, with 57% total clock power saving, compared to the con ...