This article presents an efficient methodology based on boundary integration to calculate the dc and ac impedance of power distribution networks (PDNs) for arbitrary-shape and multilayer printed circuit boards (PCBs). The proposed method adopts a boundary element method to extract inductances for the arbitrary parallel-plane shapes. Subsequently, the equivalent circuit formed by the via inductances…
IEEE Transactions on Signal and Power Integrity Template
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About the IEEE Transactions on Signal and Power Integrity format
IEEE Transactions on Signal and Power Integrity is a peer-reviewed journal published by IEEE, covering Electromagnetic Compatibility and Noise Suppression, Low-power high-performance VLSI design, 3D IC and TSV technologies. Over its lifetime it has published 112 papers, which have received 290 citations.
| Publisher | IEEE |
|---|---|
| Reference style | Numbered (IEEE) Numbered — [1], [2] in the text [1] A. Smith, B. Jones, and C. Lee, "A representative article title," IEEE Transactions on Signal and Power Integrity, vol. 12, no. 3, pp. 45–58, 2023.
Formats any DOI in IEEE Transactions on Signal and Power Integrity style. No sign-up. |
| Abbreviation (ISO-4) | TSPI |
| Publishes research in | Electromagnetic Compatibility and Noise Suppression Low-power high-performance VLSI design 3D IC and TSV technologies Microwave Engineering and Waveguides Advanced Antenna and Metasurface Technologies |
| ISSN | 2768-1866 |
| Citation impact (2-yr) | 1.19 |
| h-index | 8 |
| i10-index | 6 |
| Top institutions publishing here | Missouri University of Science and Technology |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Papers published in IEEE Transactions on Signal and Power Integrity per year
Citation impact of IEEE Transactions on Signal and Power Integrity by publication year
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Most-cited papers in IEEE Transactions on Signal and Power Integrity
In this article, we first propose and demonstrate a novel target-impedance (Z) extraction based optimal power distribution network (PDN) design methodology for high performance solid-state-drive (SSD) products. Instead of using the current profile of a chip power models (CPMs), the suggested methodology uses both measured current spectra and hierarchical PDN-Z models for target-Z calculation. We…
The design and optimization of Power Delivery Networks (PDNs) in Very Large Scale Integration (VLSI) systems is becoming very challenging with the increasing complexity of such systems. Decoupling capacitors are the key elements used in a PDN to minimize power supply noise and to maintain low impedance of the PDN to avoid system failure. In…
A trainable neural equalizer based on the long short-term memory (LSTM) neural network architecture is proposed in this article to recover the channel output signal. The current widely used solution for the transmission line signal recovery is generally realized through a decision feedback equalizer (DFE) or : Feed forward equalizer (FFE) combination. The novel learning-based…
Via transitions in high-speed channels critically influence the signal integrity and power integrity of high-speed systems. In this work, a mode-decomposition-based equivalent model of a high-speed via that can be applied at frequencies up to 100 GHz is proposed for the first time. The equivalent model for modeling the via transition consists of upper and…