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International Journal of High Performance Systems Architecture is a peer-reviewed journal published by Inderscience, covering Parallel Computing and Optimization Techniques, Interconnection Networks and Systems, Embedded Systems Design Techniques.
| Publisher | Inderscience |
|---|---|
| Reference style | Author–year (Harvard/AGSM) Author–year — (Smith, 2023) in the text Smith, A., Jones, B. and Lee, C. (2023) 'A representative article title', International Journal of High Performance Systems Architecture, 12(3), pp. 45–58.
Formats any DOI in International Journal of High Performance Systems Architecture style. No sign-up. |
| Publishes research in | Parallel Computing and Optimization Techniques Interconnection Networks and Systems Embedded Systems Design Techniques Advanced Data Storage Technologies Distributed and Parallel Computing Systems |
| ISSN | 1751-6528 |
| Citation impact (2-yr) | 0.05 |
| h-index | 15 |
| i10-index | 28 |
| Total citations | 1,163 |
| Top institutions publishing here | National Institute of Technology Raipur |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Recent trends of CMOS technology scaling and wide-spread use of multicore processors have dramatically increased the power consumption of main memory. It has been estimated that modern data-centres spend more than 30% of their total power consumption in main memory alone. This excessive power dissipation has created the problem of ‘memory power wall’ which has…
The evolution of image filters using genetic programming is a relatively unexplored task. This is most likely due to the high computational cost of evaluating the evolved programs. The parallel processors available on modern graphics cards can be used to greatly increase the speed of evaluation. Previous papers in this area dealt with tasks such…
The problem of selecting an adequate set of variables from a given data set of a sampled function becomes crucial by the time of designing the model that will approximate it. Several approaches have been presented in the literature although recent studies showed how the delta test is a powerful tool to determine if a…
In this paper we analyse the resilience of a peer-to-peer (P2P) evolutionary algorithm (EA) subject to the following dynamics: computing nodes acting as peers leave the system independently from each other causing a collective effect known as churn. Since the P2P EA has been designed to tackle large instances of computationally expensive problems, we will…
Network-on-Chip (NoC) is a new paradigm for designing future System-on-Chips (SoCs) where large numbers of Intellectual Property (IP) cores are connected through an interconnection network. The communication between the nodes is achieved by routing packets rather than wires. It supports high degree of reusability, scalability, and parallelism in communication. Here, we present NoC architecture based…
