High-assurance systems require a level of rigor, in both design and analysis, not typical of conventional systems. This paper provides an overview of the Multiple Independent Levels of Security and Safety (MILS) approach to high-assurance system design for security and safety critical embedded systems. MILS enables the development of a system using manageable units, each…
International Journal of Embedded Systems Template
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About the International Journal of Embedded Systems format
International Journal of Embedded Systems is a peer-reviewed journal published by Inderscience, covering Embedded Systems Design Techniques, Parallel Computing and Optimization Techniques, Real-Time Systems Scheduling.
| Publisher | Inderscience |
|---|---|
| Reference style | Author–year (Harvard/AGSM) Author–year — (Smith, 2023) in the text Smith, A., Jones, B. and Lee, C. (2023) 'A representative article title', International Journal of Embedded Systems, 12(3), pp. 45–58.
Formats any DOI in International Journal of Embedded Systems style. No sign-up. |
| Publishes research in | Embedded Systems Design Techniques Parallel Computing and Optimization Techniques Real-Time Systems Scheduling Cryptography and Data Security Interconnection Networks and Systems |
| ISSN | 1741-1068 |
| Citation impact (2-yr) | 0.23 |
| h-index | 21 |
| i10-index | 63 |
| Total citations | 3,340 |
| Top institutions publishing here | Nanjing University of Information Science and Technology |
| You get | A submission-ready PDF and the editable LaTeX source — ready to submit. |
Papers published in International Journal of Embedded Systems per year
Citation impact of International Journal of Embedded Systems by publication year
Citations each year’s papers have accumulated so far — the most recent years are still building up.
Most-cited papers in International Journal of Embedded Systems
The increase in connectivity and complexity of modern automotive networks presents new opportunities for potential hackers trying to take over a vehicle. To protect the automotive networks from such attacks, security mechanisms, such as firewalls or secure authentication protocols may be included. However, should an attacker succeed in bypassing such measures and gain access to…
In this paper, we study extensions to bin packing algorithms to pack software modules into processors in real-time systems. We refer to this approach as Partitioning Bin-Packing. In this study, we analytically show that with partitioning bin-packing techniques the number of bins required by traditional bin packing can be reduced. We also evaluate heuristics to…
We describe a cryptographic processor for Elliptic Curve Cryptography (ECC). The processor performs point multiplication for elliptic curves over binary polynomial fields GF(2m) up to a field degree of 255. In contrast to other designs that only support one curve at a time, our processor is capable of handling arbitrary curves. We have implemented the…
In this paper, we present an overview of the Artemis workbench, which provides modelling and simulation methods and tools for efficient performance evaluation and exploration of heterogeneous embedded multimedia systems. More specifically, we describe the Artemis system-level modelling methodology, including its support for gradual refinement of architecture performance models as well as for calibration of…